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FAST – Future Architecture System Testing

System Highlights

  • Family of intelligent avionics I/O modules controlled via Gigabit Ethernet
  • Support of specific avionics signals
  • Integrated SW-configurable signal conditioning and error stimulation
  • Avionics discretes and analog signals for both input and output
  • Original Equipment and Simulation test mode
  • Connectors for two systems under test (SUT)
  • All FAST modules have the same path switching
  • FAST-API to user-written applications

The Idea behind FAST

FAST Block Diagram
Click to enlarge

FAST is a network-attached input/output subsystem that can be connected to virtually any industrial computer system. The subsystem is a self-contained family of modules dedicated to the task of gathering electrical signals, routing signals between original equipment, such as sensors or actuators, and simulating electronic signals.

With hardware-in-the-loop (HIL) testing in mind, the complete interface to the real equipment may be supplied through FAST. Typical applications, such as reading, analyzing/injecting, and writing signals, can be performed with FAST. The use of FAST is hassle-free through extensive software configuration options. These include input/output direction, routing of one signal up to three units, and signal conditioning.

Synchronization between all members of FAST can be either via network or through a high accuracy time sync bus.

The time sync bus is compensated to allow for time stamp accuracy down to 1 μsec.

Each member of FAST has a dedicated multichannel physical IO. Examples of FAST interfaces are analog, avionics discrete, resistive sensors, such as temperature or pressure, or relays. Serial interface type FASTs are SPI or UART. On customer request special interfaces can be implemented. Within avionics industry, FAST supports customized test scenarios with a set of different IOs, such as analog, digital, and propriety serial interfaces.

The integration into the test system is achieved through a uniform software API interface.

The local CPU generates standardized UDP packets for communication and encapsulates module specific information.

How FAST Works

FAST Channel Functions
Click to enlarge

Each FAST family member has a local CPU running an embedded LINUX OS. The CPU is released from high speed IO tasks, wherever necessary, by either an FPGA or DSP core computing the IO without interaction of the main CPU. Time stamping of all activities allows for distinct analysis of cause and action within complex, multidomain test systems.

In addition, the FAST subsystem can be used in either of two modes, frame-based or event-driven. Events can be generated through predefined conditions, such as signal limits or signal filters, or through programs locally executed on the FAST module. Due to the LINUX operating system, extensive development support is provided to develop these programs.

How to Operate FAST

FAST is a network-attached subsystem. For operation, a dedicated 1 Gbit/s LAN port is recommended with COTS switches to connect all FAST modules to the host. The TechSATprovided API will perform system management tasks without the need for user code / application.

Each FAST type will be addressed through a dedicated FAST API driver providing data structures to the user application for data communication.

A well-defined command set is utilized to control the FAST interfaces either on a per port, module, group of modules, or system wide basis. This will allow for synchronous interaction with the UUT.

Requirements

  • 28 V / 20 W max per module power supply.
    Some modules require auxiliary power for the UUT, such as a programmable power supply for UUT components.
  • Ethernet interface –A dedicated 1 Gbit/s LAN is recommended.
  • For high timing accuracy application, an external clock source is required, such as IRIG-B or GPS.

Technical Data

Physical Dimensions

  • FAST: 220 mm (depth) x 233 mm (height) (6U)
  • Breakout: 121 mm (depth) x 233 mm (height) (6U)
  • Overall depth: 350 mm
  • Width: 4HP
  • Max. number of slots: 21 per 19“ crate

Power Consumption

  • 28 V / 20 W max per module AUX power consumption
  • UUT power as specified

Communication

  • 100 Mbit/s LAN interface on FAST module
  • Recommended 1 Gbit/s interconnect on dedicated network

FAST Interface Types

  • AIO12 – Analog I/O, 12 channels
  • DSIO24 – Digital Signal I/O, 24 channels
  • RSS8 (PT, NTC, PTC, R2on) – Resistive Sensor Simulation, 8 channels
  • VLU8 – Versatile Load Unit, 8 channels
  • FCS25 – Form C Switch, 25 channels:
    > Small signals (2 A)
    > High current signals (6 A)
  • RFR6 – Radio Frequency Relay board, 6 channels, Ethernet router
  • SPI – Serial Peripheral Interface, 17 channels
  • DEU-A – Display Electronics Unit – Type A
  • DEU-B (opt.) – Display Electronics Unit – Type B
  • TimeMaster

System Functionality

  • Family of intelligent I/O modules
  • Controlled via Ethernet
  • Specific avionics signals
  • Integrated SW-configurable signal conditioning and error stimulation
  • Bi-directional data transmission for
    - avionics discretes
    - analog signals
  • Switching between Original Equipment test mode and Simulation test
    mode
  • Connectors for two systems under test (SUT)
  • Same path switching on all FAST modules
  • Time synchronization via IEEE-1588 Precision Time Protocol (PTP)
  • FAST API to user-writter applications
  • FAST ADS2 driver software

Operating Environment

  • Temp. operating: 0 °C to 45 °C
  • Temp. storage: -25 °C to 70 °C
  • Humidity operating: 30% to 95% not-condensing

 

 
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